![]() (2)Bombardment and implantation of Phosphorus atoms, which penetrate through the thin layer of SiO2 being retained by Si3N4 in the areas where it was not removed. (4)Removal of the exposed photosensitive material.įrame 4 – (1)Removal by etching of Si3N4 and Polysilicon layers in the areas not protected by the photosensitive layer. (3)By a photolithography process the wafer is exposed to UV light through previously developed masks that define the location of the n-doped wells where the pMOS will be created. (2)Deposition of a photosensitive and resistant to etching product layer over the above ones. Silicon Dioxide (SiO2) is used as a protective layer to the ultra clean silicon wafer’s surface and also as an insulating layer.įrame 3 – (1)Deposition of Polysilicon layer followed by a Silicon Nitride (Si3N4) layer. ![]() The number of frames is much smaller because we decided to accumulate many manufacturing phases in each frame, essentially standing out the way of manufacturing one transistor comprising two opposite, nMOS and pMOS.įrame 1 – The wafers taken from the silicon ingot are polished and cleaned of any impurities.įrame 2 – The wafer’s surface is oxidized. Let’s go through it step by step with the help of the tables in Figure 1-20. The manufacture of these transistors is very similar to what we saw for the nMOS transistors.
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